OpenAI's Jalapeño ASIC Is Real Silicon, Not a Roadmap Slide

OpenAI and Broadcom have taped out a custom inference chip called Jalapeño — a named part built for a specific workload, which is more than most announcements can claim.

OpenAI's first custom chip is named Jalapeño, an ASIC designed explicitly for inference workloads.
Broadcom is the design and manufacturing partner — the company that actually knows how to build ASICs at scale.
The chip targets inference, not training — a deliberate scope decision that shapes every tradeoff in the design.
No clock speed, die size, or watt figure has been disclosed, which means the spec sheet is still a secret or still aspirational.
Moving inference off Nvidia silicon is the implicit goal; whether Jalapeño is cheaper or faster per token is the only question that matters.

OpenAI has a chip. It is called Jalapeño. Broadcom built it. That is already more than most AI hardware announcements deliver — a name, a partner, and a workload.

The workload is inference. Not training. That is a real design decision, not a hedge. Training and inference pull in opposite directions: training wants maximum throughput across a long run, inference wants low latency on a short one. Building an ASIC for one means accepting it is wrong for the other. OpenAI has chosen a side.

Broadcom is the right partner for this. They have done custom silicon for Google — the TPU family runs through Broadcom's networking and packaging lines — and they understand what it takes to get an ASIC from a block diagram to a shipping rack. OpenAI did not build this alone, and should not pretend otherwise. Broadcom built it.

What OpenAI has not released: clock speed, die size, power envelope, tokens per second per dollar, or yield numbers. Without those, Jalapeño is a name and a press release. The engineering claim is that it runs inference cheaper or faster than the Nvidia hardware it presumably replaces. That claim needs a number. No number has appeared.

The tradeoff is visible even without the spec sheet. An inference-only ASIC gives up flexibility. If OpenAI's model architecture shifts — attention head counts, context window, quantization scheme — the chip either adapts or it does not. Fixed silicon does not patch easily. That is the bet: that the inference workload is stable enough to justify freezing it in metal.

Maybe it is. The number will say.